Università degli Studi di Siena Department of Information Engineering and Mathematics (DIISM) Course of Computer Architecture 2023-2024

Latest News (home)   Registration   Lessons (restricted access)   Errata slides   Tools for lab   Syllabus   Office Hours   Registration for mid-terms (University site)   previous exams   Projects   Exam Rules   Feedback   RELATED LINKS bgcolor="#FFFFFF" width="840" height="1720" border="0" cellpadding="0" cellspacing="0" valign="top" align="left">    WELCOME to the site for the course COMPUTER ARCHITECTURE News: since the 2019-20 academic year the RISC-V processor will be used as reference, instead of MIPS: an OPEN-SOURCE initiative, launched by the University of Berkeley and now a worldwide standard, well supported by both the market and the Patterson-Hennessy textbook.  COURSE START This course will start (regularly, in presence) on 02-10-2023 at 08:30. This course is given in presence. For those who can't attend in presence, it is possible to present the 2020-21 syllabus, for which all videolessons are available: SITE COMPUTER ARCHITECTURE 2020-21  REGISTRATION ON THIS WEBSITE URGENT: Please register on this website as soon as possible: I need to have your emails to stay in touch!  WEBRISC-V! Hoping that it could be useful for the study of the pipeline the WebRISC-V simulator has been realesed.  Patterson-Hennessy 4^ed - APPENDIX-B. Appendix B (which includes several digital design topics and Verilog) can be found on this site, along with various other complementary material of this textbook. This is the direct link to the part of Basic Logic Design.  Material of the previous editions of this course The material of the previous editions of this course is always available at this page